EDN

Clock Buffers Offer Low Additive Phase Jitter

This application note briefly explains the theory behind measuring additive phase noise for IDT clock buffers and summarizes the additive phase jitter results for several widely used IDT clock buffers ...
Business Wire

Skyworks Unveils Industry’s First Clocks for Ethernet and PCI Express® With 18fs RMS Phase Jitter

The SKY63104/5/6 family of jitter attenuating clocks and SKY62101 clock generators are the industry’s first clock devices that can simultaneously generate Ethernet and PCI Express® (PCIe) spread ...
EDN

SIGNAL CHAIN BASICS #61: Clock jitter demystified-random jitter and phase noise, Part 2

Editor's note: Signal Chain Basics is an ongoing and popular series; click here for a complete, linked list of all installments.) In Signal Chain Basics Part 56 we discussed the fundamental ...